1. Field of the Invention
The present invention relates to a printed circuit board and a method of manufacturing the same.
2. Description of the Background Art
Conventionally, a COF (Chip On Film) mounting technique has been known as a technique for mounting electronic components such as an LSI (Large Scale Integration) on a film-like substrate. In general, the substrate for COF (hereinafter referred to as the COF substrate) has a two-layer structure of an insulating layer made of polyimide and a conductive pattern made of copper. Terminals are formed on the conductive pattern. Terminals (bumps) of the electronic components are bonded to the terminals of the conductive pattern.
With a finer pitch of the COF substrate and higher performance of the electronic components, a heating value at the time of driving increases. This causes problems such as a malfunction of the electronic components in some cases; therefore, it is important to carry out sufficient heat dissipation. Thus, it is proposed to provide a metal layer for heat dissipation on a back surface (a surface to which the electronic components are not bonded) of the insulating layer of the COF substrate.
In a tape circuit board disclosed in JP 2007-27682 A, for example, the metal layer is formed, below a chip mounting region, on a lower surface of a base film.
FIG. 9 is a schematic sectional view of a conventional COF substrate provided with the metal layer. In the COF substrate 200 of FIG. 9, conductive traces 32 are provided on one surface of the insulating layer 31 while the metal layer 33 is provided on the other surface. The bumps 35a of the electronic component 35 are bonded to terminals of the conductive traces 32. Such a configuration causes heat of the electronic component 35 to be dissipated through the metal layer 33.
The electronic component 35 is connected to the terminals of the conductive traces 32 by thermocompression bonding, for example. In the case, the insulating layer 31 and the metal layer 33 of the COF substrate 200 are expanded by heat. In addition, the insulating layer 31 and the metal layer 33 are also expanded by heat generated by the electronic component 35 at the time of driving the electronic component 35.
A distance between the bumps 35a of the electronic component 35 are much smaller than the expansion volume of the metal layer 33. Therefore, stresses are applied to the terminals of the conductive traces 32 when the insulating layer 31 and the metal layer 33 are expanded.
Since the insulating layer 33 is flexed in the case of no metal layer 33 provided, the stresses applied to the terminals are relaxed. When the metal layer 33 is provided, however, the insulating layer 31 is unlikely to be flexed, thus not relaxing the stresses applied to the terminals. As a result, the conductive traces 32 are stripped from the insulating layer 31, and the terminals of the conductive traces 32 are separated from the bumps 35a of the electronic component 35 in some cases.